1/9 september 2002 . STD19NE06L n-channel 60v - 0.038 w - 19a ipak/dpak stripfet? power mosfet n typical r ds (on) = 0.038 w n 100% avalanche tested n low gate charge n through-hole ipak (to-251) power package in tube (suffix -1") n surface-mounting dpak (to-252) power package in tape & reel (suffix t4") description this power mosfet is the latest development of stmicroelectronis unique "single feature size?" strip- based process. the resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. applications n high current, high speed switching n solenoid and ralay drivers n motor control, audio amplifiers n dc-dc & dc-ac converters type v dss r ds(on) i d STD19NE06L 60 v <0.05 w 19 a 3 2 1 1 3 ipak to-251 (suffix -1) dpak to-252 (suffix t4) absolute maximum ratings ( ) pulse width limited by safe operating area (1) starting t j = 25 o c, i d = 9.5 a, v dd = 35 v symbol parameter value unit v ds drain-source voltage (v gs = 0) 60 v v dgr drain-gate voltage (r gs = 20 k w ) 60 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c 19 a i d drain current (continuous) at t c = 100c 13 a i dm ( ) drain current (pulsed) 76 a p tot total dissipation at t c = 25c 70 w derating factor 0.3 w/c e as (1) single pulse avalanche energy 450 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature internal schematic diagram
STD19NE06L 2/9 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-case rthj-amb rthc-sink t l thermal resistance junction-case thermal resistance junction-ambient thermal resistance case-sink maximum lead temperature for soldering purpose max max typ 2.14 100 1.5 300 c/w c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 60 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 1 1.7 2.5 v r ds(on) static drain-source on resistance v gs = 5 v i d = 9.5 a v gs = 10 v i d = 9.5 a 0.048 0.038 0.06 0.05 w w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds > i d(on) x r ds(on)max, i d = 9.5 a 714 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 1350 195 58 pf pf pf
3/9 STD19NE06L switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 30 v i d = 15 a r g = 4.7 w v gs = 4.5 v (resistive load, figure 3) 25 105 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 48 v i d = 30 a v gs = 5v 20 8 10 28 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 30 v i d = 15 a r g = 4.7 w, v gs = 4.5 v (resistive load, figure 3) 50 20 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v clamp = 48 v i d = 12 a r g = 4.7 w, v gs = 5v (inductive load, figure 5) 15 40 60 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 19 76 a a v sd (*) forward on voltage i sd = 30 a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 30 a di/dt = 100a/s v dd = 30 v t j = 150c (see test circuit, figure 5) 80 0.18 4.5 ns m c a electrical characteristics (continued) safe operating area thermal impedance
STD19NE06L 4/9 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/9 STD19NE06L normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics . . .
STD19NE06L 6/9 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/9 STD19NE06L dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 1 3 = = b3 b b6 b2 e g = = = = b5 2 to-251 (ipak) mechanical data 0068771-e
STD19NE06L 8/9 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.9 0.025 0.035 b2 5.2 5.4 0.204 0.212 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 9.35 10.1 0.368 0.397 l2 0.8 0.031 l4 0.6 1 0.023 0.039 == d l2 l4 1 3 == b e == b2 g 2 a c2 c h a1 detail "a" a2 detail "a" to-252 (dpak) mechanical data 0068772-b
9/9 STD19NE06L information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics a 2002 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com
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